Charge-Trapping Non-Volatile Memories: Volume 1 – Basic and by Panagiotis Dimitrakis

By Panagiotis Dimitrakis

This e-book describes the fundamental applied sciences and operation ideas of charge-trapping non-volatile thoughts. The authors clarify the gadget physics of every equipment structure and supply a concrete description of the fabrics concerned in addition to the basic homes of the know-how. sleek fabric houses used as charge-trapping layers, for brand new purposes are introduced.

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2013). The next section reviews the technical aspects of charge trap memories and compares it to the planar floating gate memory. There are several key technological obstacles that must be overcome for a successful charge trap memory in a NAND configuration. This section shows the results of Micron’s efforts to implement CTF in a high density NAND and serves as a case study for the technical problems associated with this effort (Ramaswamy et al. 2013). The program/erase slope is the change in threshold voltage for a change in the control gate voltage.

This leads to the replacement of the FG layer by a two-dimensional (2-D) array of tiny Si islands floating (embedded) in the gate dielectric stack above the channel of a MOSFET. A schematic of the new cell is given in Fig. 14. In brief, a layer of QDs (<8 nm) is formed on-top of the TOX and then it is covered by the 1 Introduction to NVM Devices 21 same or another oxide (or more general by another dielectric material), which is called control oxide (COX) (or in general control dielectric). The PGM/ERS/READ operations are exactly the same like the NAND or NOR FG-Flash, where the QDs act as storage nodes substituting the FG.

2008; Aritome 2013; Micheloni et al. 2010; Richter 2013). K. Prall (*) • N. Ramaswamy • A. , Mail Stop 1-715, 8000S. O. com © Springer International Publishing Switzerland 2015 P. 2 K. Prall et al. A Short History of Nonvolatile Memories and NAND NAND memory is a descendent of multiple types of floating gate technologies and the NAND ROM (Cappelletti et al. 1999; Brown et al. 1998; Brewer et al. 2008; Masuoka et al. 1987). The focus of this chapter is the NAND state of the art. 1. These highlights show the large advances in the technology which led to the evolution of NAND into its current dominant position.

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