By Guojun Wang, Albert Zomaya, Gregorio Martinez, Kenli Li
This 4 quantity set LNCS 9528, 9529, 9530 and 9531 constitutes the refereed complaints of the fifteenth foreign convention on Algorithms and Architectures for Parallel Processing, ICA3PP 2015, held in Zhangjiajie, China, in November 2015.
The 219 revised complete papers offered including seventy seven workshop papers in those 4 volumes have been conscientiously reviewed and chosen from 807 submissions (602 complete papers and 205 workshop papers). the 1st quantity includes the next issues: parallel and dispensed architectures; disbursed and network-based computing and net of items and cyber-physical-social computing. the second one quantity contains themes corresponding to mammoth facts and its functions and parallel and dispensed algorithms. the themes of the 3rd quantity are: purposes of parallel and dispensed computing and repair dependability and safety in disbursed and parallel structures. The lined themes of the fourth quantity are: software program platforms and programming versions and function modeling and evaluation.
Read Online or Download Algorithms and Architectures for Parallel Processing: 15th International Conference, ICA3PP 2015, Zhangjiajie, China, November 18-20, 2015, Proceedings, Part I PDF
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Chang Liu, Juan Luo, and Qiu Pan 50 Unified Virtual Memory Support for Deep CNN Accelerator on SoC FPGA . . . . . . . . . . . . . . . . . . . . . . Tao Xiao, Yuran Qiao, Junzhong Shen, Qianming Yang, and Mei Wen 64 DaSS: Dynamic Time Slice Scheduler for Virtual Machine Monitor . . . . Ruhui Ma, Jian Li, Liwei Lin, and Haibing Guan Memory-Aware NoC Application Mapping Based on Adaptive Genetic Algorithm . . . .
Cn Abstract. Although block cryptography algorithms have been parallelized into different platforms, they have not yet been explored on speculative multicore architecture thoroughly, especially under CBC, CFB and OFB modes. This paper presents a study of parallelizing several block cryptography algorithms (AES, 3DES, RC5 and TWOFISH) on a novel speculative multicore architecture, including its speculative execution mechanism, architectural design and programming model.
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